1. Field of the Invention
The field of the invention is data processing, or, more specifically, methods, apparatus, and products for providing bus resiliency in a hybrid memory system.
2. Description of Related Art
In computer systems today, main memory is an important component. Traditionally, volatile DRAM (Dynamic Random Access Memory) was utilized as main memory for computer systems. Today, non-volatile memory, such as Flash memory, is also being utilized in main memory. Rather than establishing a new bus protocol to handle the Flash memory, however, the Flash memory device is typically retrofit for installation in traditional DIMM (Dual Inline Memory Module) slots for communication over DDR (Double Data Rate) and PCIe (Peripheral Component Interconnect Express) busses. Such a bus, however, typically operates in a protocol not native to that of a memory controller on the Flash device. To retrofit the Flash device to operate on the non-native bus, the Flash device includes a bus adapter that effectively translates between the bus protocol and the format in which the Flash's memory control operates.
Bus resiliency features controlled by the hardware effecting the traditional bus protocols, however, are not utilized with the Flash memory because the Flash memory does not produce any errors native to the bus. Instead, in prior art systems, a software module administers the Flash memory, periodically determining whether errors exist in the Flash memory. In other embodiments, out-of-band hardware modules, such as SMBus (System Management Bus) modules, administer such error conditions. In either case, bus resiliency with respect to the Flash memory is inefficient.